The present invention claims the benefit of Korean Patent Application No. 2001-20741 filed in Korea on Apr. 18, 2001, which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor memory device, and more particularly, to a method for forming a capacitor of a semiconductor memory device.
2. Background of the Related Art
A related art method for forming a capacitor of a semiconductor device will be described with reference to the accompanying drawings. FIGS. 1A to 1C are sectional views illustrating related art process steps of forming a capacitor of a semiconductor device. FIGS. 2A and 2B are images showing a decrease in height of a storage node during etch-back of a seed metal layer in the related art.
In a process for fabricating a DRAM capacitor using an electro-chemical deposition (ECD) process, after a platinum (Pt) storage node is formed by Pt deposition, an isolation process of a storage node is performed by a Pt dry etch-back process. A related art isolation process of a storage node in forming a related art capacitor will be described below.
As shown in FIG. 1A, an insulating film 1 and a surface anti-reflecting film 2 are sequentially formed on a semiconductor substrate (not shown) in which a cell transistor (not shown) is formed. A contact hole is formed to connect a capacitor with one electrode of the cell transistor.
A doped polysilicon layer is deposited within the contact hole by a chemical vapor deposition (CVD) process. The doped polysilicon layer is then etched back to form a recess portion so that a plug layer 3 is formed. A low resistance contact film 4 and a barrier film 5 are formed in the recess portion to reduce contact resistance between the plug layer 3 and the barrier film 5 which will be formed later.
The low resistance contact film 4 is formed by depositing a material such as titanium (Ti) on silicon (Si), annealing the result to form TiSix, and removing some of Ti that is not reacted with Si.
The barrier film 5 is then formed on an entire surface including a portion where the low resistance contact film 4 is formed. The barrier film 5 is planarized to remain on the low resistance contact film 4.
Subsequently, Pt is deposited on the entire surface to form a first metal layer 6 used as a seed layer. A dummy insulating film 7 for patterning of a storage node is then formed on the entire surface. The dummy insulating film 7 is selectively etched by a photolithographic process so that a storage node formation region (lower electrode of a capacitor) is defined.
Next, a second metal layer 8 is formed using the first metal layer 6 exposed in the storage node formation region (i.e., in a portion where the dummy insulating film 7 is removed) as a seed layer. The second metal layer 8 is formed using the ECD process.
As shown in FIG. 1B, the dummy insulating film 7 is removed by a wet deep-out process and the first metal layer 6 other than the storage node formation region is removed by a dry etch-back process.
However, in this case, since the first metal layer 6 used as a seed layer is dry etched without using a photo mask, the storage node 9 is also etched. For this reason, insufficient height of the storage node 9 is obtained. As a result, the height of the storage node decreases from a height (A) of FIG. 1B to a height (B) of FIG. 1C.
Decreased height of the storage node is shown in FIGS. 2A and 2B. Here, FIG. 2A is an image after deposition of the second metal layer 8 for forming the storage node by the ECD process, and FIG. 2B is an image after wet deep-out of the dummy insulating film 7 and etch-back of the first metal layer 6 used as a seed layer. Referring to FIG. 2B, it is noted that the storage node height is significantly decreased as loss of the storage node is seriously generated.
However, the related art method for forming a capacitor of a semiconductor device has several problems. For example, since a Pt seed layer is dry etched without using a mask when the storage node is formed after depositing Pt by the ECD process, an area of the lower electrode is reduced, thereby reducing dielectric capacitance of the BST capacitor. As a result, efficiency of the capacitor is reduced.
Accordingly, the present invention is directed to a method for forming a capacitor of a semiconductor device that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a method for forming a capacitor of a semiconductor device that prevents loss of a storage node during an isolation process between cells of the storage node, thereby obtaining a sufficient height of the storage node.
Another object of the present invention is to provide a method for forming a semiconductor device having good capacitance.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a method for forming capacitor of a semiconductor device the steps of forming a first insulating film on a substrate, the first insulating film having a contact hole; forming a conductive layer within the contact hole; forming a seed metal layer on the first insulating film and the conductive layer; forming a second insulating film on the seed metal layer; selectively etching the second insulating film to form a lower electrode formation region; forming a lower electrode formation material layer in the lower electrode formation region using the seed metal layer, the lower electrode formation a material layer having a height lower than a surface of the second insulating film; forming a passivation film on the lower electrode formation material layer; and removing the second insulating film and portions of the seed metal layer using the passivation film as a mask.
In another aspect, a method for forming a capacitor of a semiconductor device includes the steps of the steps of sequentially forming an insulating film and a surface anti-reflecting film on a surface of a semiconductor substrate including a cell transistor; selectively etching the insulating film and the surface anti-reflecting film to form a contact hole; sequentially forming a plug layer, a low resistance contact film, and a barrier film within the contact hole; depositing Pt on the anti-reflecting film and the barrier film to form a first metal layer used as a seed layer; forming a dummy insulating film on the first metal layer and selectively etching the dummy insulating film to form a lower electrode formation region; depositing Pt in the electrode formation region by an ECD process using the exposed first metal layer as a seed layer to form a second metal layer; depositing TiN on at least the second metal layer and planarizing the TiN to remain at a height substantially equal to an upper surface of the dummy insulating film so that a passivation film is formed; removing the dummy insulating film and portions of the first metal layer to form a lower electrode; depositing BST on the entire surface to form a dielectric film; crystallizing the dielectric film; and depositing Pt on the dielectric film and selectively patterning the Pt to form an upper electrode.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.